Masters and PhD Projects Fall 2006 & Spring 2007 - Larry Wittie   4sep06

Please send email to lw @ ic . sunysb . edu or find me in the 1308 CSB NetLab.

We have several masters (CSE523/524), independent study (CSE593) and PhD projects

 

Masters CSE523/524 or Independent Study CSE593 

We have built a Linux-Debian-based parallel computer simulation grid from 8 (mainly dual) Intel Xeon servers. The Xeon machines each have one or two fast Xeon processors, 1 Gigabyte (GB) to 4 GB of memory, and 0.5 to 1.5 Terabytes (TB) of local disk.  The grid is used for simulations of large-scale shared cache multiprocessor systems and soon for simulations of memory and attention mechanisms in human brains.  As we get access to several larger grids - CEWITT, Stony Brook’s new SeaWulf, and NSF’s national sites, our lab grid will help create prototypes of codes to run on larger systems.  Our small grid offers research students hands-on systems-level access and Linux experience that is much harder to arrange on larger production systems.

 

Parallel Computer Simulation Grid

Help improve our parallel computer simulation. We need to instrument the grid with software to monitor switch traffic patterns and environmental conditions and often need new software packages installed and made compatible with our existing simulation systems and remote laptops.

1 or 2 MS projects

 

Large Parallel Computer Shared Cache Simulator

Our parallel computer simulations run on the industrial strength functional architectural simulation system Simics, from Virtutech (www.virtutech.com/our-tech/white-papers.pl) on individual Linux processors. For detailed cache usage and timing information, we are also running the Wisconsin architecture group Gems cache and parallel processor simulation system, a front-end for Simics and a standard for computer architecture papers. We are considering using the faster SimFlex alternative to Gems from Carnegie Mellon. We plan to expand our simulation system to simulate large multiprocessors simultaneously on many Linux servers and on larger grids, such as CEWIT and SeaWulf. We need students to evaluate SimFlex for our purposes, to code a shared cache objects in C++ for Gems and Simics, to code a remote central memory controller in C++, and to add intra-Simics process ports to Simics to allow multiple servers to co-operate for simultaneous simulation of large parallel computer systems. 

4 or 5 MS projects

 

Brain Organization Simulation System

Help port the Brain Organization Simulation System (BOSS) from an older version of C to compile and run on individual Linux systems.  Expand the system to run on Linux grid multi-computers, such as CEWIT, SeaWulf and the NSF national grids.  BOSS allows the precise but conveniently statistical specification of brain tissue models with thousands or millions of component neurons and millions of synapses connections between neurons.  After forming a specific model of the tissue, it simulates individual neuron firing patterns within the tissue.  BOSS will be used to study mammalian brain memory and attention structures that allow the creation of stably repeatable firing-patterns (memories).  Spatially distributed stimulus patterns and neuronal firing pattern outputs are available for graphical presentation.

2 or 3 MS projects

 

Secure Grid Computing

Help port versions of Linux that use read-only CD disks to build a grid interface computer that accepts only pre-authorized tasks on the grid and resists hacker attacks that attempt to rewrite operating system software to gain control.

1 or 2 MS projects

 

PhD CSE699 

Bridging Deep Multicomputer Memory Latencies

Current distributed-shared-memory systems using network-wide coherence for individual processor caches or multi-threaded architectures are limited to a few hundred or at most a thousand processors.  This project is exploring the use of shared caches, (Sun) Store Order cache coherence methods (which we independently discovered as “eagersharing” in 1990), and thread support hierarchies to design practical shared memory systems with tens of thousands of processors. 

The key problem is that for Petaflops (1015 floating operations per second) systems built from thousands of 10 to 100 Gigahertz (GHz) processors, memory systems are physically so large that signal propagation delays between massive main memories and individual processors are 1,000 to 10,000 processor cycle times.

Techniques that solve the latency problem for petaflops multiprocessors will also help solve memory bandwidth and latency limitations for modern multi-core computer-networks-on-a-chip and for future worldwide global memory addressing that will become feasible in computers with 128-bit memory addresses.

Simulations will use the Gems-Simics system and other techniques to demonstrate the effectiveness of the latency bridging methods.

1 or 2 CS PhD students, in addition to the one ECE student already working on the project

 

Mammalian Memory and Attention Mechanisms for Artificial Brains

I did early studies of learning mechanisms in cerebellar brain structures several decades ago, before leaving the then-new field of neuroscience to concentrate on computer networks and distributed operating systems.  I think the state of knowledge in neuroscience is adequate now to complete my 40-year dream of building human-like artificial memory systems.

1 to 3 PhD students